[commit: ghc] master: allocateRegsAndSpill: disable a panic for the time being (see comment) (4058965)

Simon Marlow marlowsd at gmail.com
Tue Apr 5 17:05:43 CEST 2011


Repository : ssh://darcs.haskell.org//srv/darcs/ghc

On branch  : master

http://hackage.haskell.org/trac/ghc/changeset/40589658a18f116acea1664b1e75eb74385a2e87

>---------------------------------------------------------------

commit 40589658a18f116acea1664b1e75eb74385a2e87
Author: Simon Marlow <marlowsd at gmail.com>
Date:   Tue Apr 5 15:18:47 2011 +0100

    allocateRegsAndSpill: disable a panic for the time being (see comment)

>---------------------------------------------------------------

 compiler/nativeGen/RegAlloc/Linear/Main.hs |    9 ++++++++-
 1 files changed, 8 insertions(+), 1 deletions(-)

diff --git a/compiler/nativeGen/RegAlloc/Linear/Main.hs b/compiler/nativeGen/RegAlloc/Linear/Main.hs
index c181f0e..473b549 100644
--- a/compiler/nativeGen/RegAlloc/Linear/Main.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/Main.hs
@@ -621,7 +621,14 @@ allocateRegsAndSpill reading keep spills alloc (r:rs)
 		-- Not already in a register, so we need to find a free one...
 		Just (InMem slot) | reading   -> doSpill (ReadMem slot)
 				  | otherwise -> doSpill WriteMem
-		Nothing | reading   -> panic "allocateRegsAndSpill: Cannot read from uninitialized register"
+                Nothing | reading   ->
+                   -- pprPanic "allocateRegsAndSpill: Cannot read from uninitialized register" (ppr r)
+                   -- ToDo: This case should be a panic, but we
+                   -- sometimes see an unreachable basic block which
+                   -- triggers this because the register allocator
+                   -- will start with an empty assignment.
+                   doSpill WriteNew
+
 			| otherwise -> doSpill WriteNew
 	
 





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