[commit: ghc] simd: Merge remote-tracking branch 'origin/master' into simd (f122d0f)
Geoffrey Mainland
gmainlan at microsoft.com
Thu Apr 5 20:16:41 CEST 2012
Repository : ssh://darcs.haskell.org//srv/darcs/ghc
On branch : simd
http://hackage.haskell.org/trac/ghc/changeset/f122d0ff4e129b98689677f013e79df5544983a0
>---------------------------------------------------------------
commit f122d0ff4e129b98689677f013e79df5544983a0
Merge: 7707eef... 68b59ce...
Author: Geoffrey Mainland <gmainlan at microsoft.com>
Date: Fri Feb 10 16:39:23 2012 +0000
Merge remote-tracking branch 'origin/master' into simd
Conflicts:
compiler/llvmGen/Llvm/PpLlvm.hs
aclocal.m4 | 30 +-
compiler/basicTypes/DataCon.lhs | 93 +-
compiler/codeGen/StgCmmPrim.hs | 24 +-
compiler/coreSyn/CoreLint.lhs | 231 +-
compiler/deSugar/DsBinds.lhs | 5 +-
compiler/deSugar/DsExpr.lhs | 10 +-
compiler/deSugar/DsExpr.lhs-boot | 15 +-
compiler/deSugar/DsForeign.lhs | 2 +-
compiler/deSugar/DsListComp.lhs | 2 +-
compiler/deSugar/DsMeta.hs | 16 +-
compiler/deSugar/DsMonad.lhs | 9 +-
compiler/deSugar/Match.lhs | 2 +-
compiler/deSugar/Match.lhs-boot | 51 +-
compiler/ghc.cabal.in | 6 +-
compiler/ghc.mk | 12 +-
compiler/hsSyn/Convert.lhs | 20 +-
compiler/hsSyn/HsDecls.lhs | 61 +-
compiler/hsSyn/HsExpr.lhs-boot | 19 +-
compiler/hsSyn/HsUtils.lhs | 24 +-
compiler/iface/BinIface.hs | 2 +-
compiler/iface/BuildTyCl.lhs | 8 -
compiler/iface/LoadIface.lhs | 6 +-
compiler/llvmGen/Llvm.hs | 3 +
compiler/llvmGen/Llvm/AbsSyn.hs | 25 +-
compiler/llvmGen/Llvm/PpLlvm.hs | 14 +
compiler/llvmGen/LlvmCodeGen/CodeGen.hs | 31 +-
compiler/main/DynFlags.hs | 14 +-
compiler/main/HscMain.hs | 68 +-
compiler/main/HscStats.lhs | 13 +-
compiler/main/HscTypes.lhs | 8 +-
compiler/main/InteractiveEval.hs | 21 +-
compiler/main/Packages.lhs | 2 +-
compiler/nativeGen/SPARC/CodeGen/Gen32.hs-boot | 11 +-
compiler/parser/Lexer.x | 2 -
compiler/parser/Parser.y.pp | 58 +-
compiler/prelude/TysWiredIn.lhs | 20 +-
compiler/rename/RnEnv.lhs | 12 +-
compiler/rename/RnExpr.lhs | 2 +-
compiler/rename/RnExpr.lhs-boot | 19 +-
compiler/rename/RnNames.lhs | 38 +-
compiler/rename/RnSource.lhs | 25 +-
compiler/rename/RnTypes.lhs | 4 +-
compiler/simplCore/SimplMonad.lhs | 8 +-
compiler/simplCore/SimplUtils.lhs | 4 +-
compiler/simplCore/Simplify.lhs | 8 +-
compiler/typecheck/FamInst.lhs | 3 +-
compiler/typecheck/Inst.lhs | 2 +-
compiler/typecheck/TcBinds.lhs | 4 +-
compiler/typecheck/TcClassDcl.lhs | 2 +-
compiler/typecheck/TcDeriv.lhs | 8 +-
compiler/typecheck/TcEnv.lhs | 2 +-
compiler/typecheck/TcErrors.lhs | 2 +-
compiler/typecheck/TcExpr.lhs | 2 +-
compiler/typecheck/TcExpr.lhs-boot | 25 +-
compiler/typecheck/TcForeign.lhs | 12 +-
compiler/typecheck/TcGenGenerics.lhs | 2 +-
compiler/typecheck/TcHsType.lhs | 59 +-
compiler/typecheck/TcInstDcls.lhs | 74 +-
compiler/typecheck/TcMType.lhs | 4 +-
compiler/typecheck/TcMatches.lhs | 2 +-
compiler/typecheck/TcMatches.lhs-boot | 23 +-
compiler/typecheck/TcRnDriver.lhs | 1279 +++++-----
compiler/typecheck/TcRnMonad.lhs | 21 +-
compiler/typecheck/TcRnTypes.lhs | 4 +
compiler/typecheck/TcSMonad.lhs | 2 +-
compiler/typecheck/TcSimplify.lhs-old | 3297 ------------------------
compiler/typecheck/TcSplice.lhs | 3 +-
compiler/typecheck/TcSplice.lhs-boot | 27 +-
compiler/typecheck/TcTyClsDecls.lhs | 11 +-
compiler/typecheck/TcUnify.lhs-boot | 7 -
compiler/types/Kind.lhs | 61 +-
compiler/types/TyCon.lhs | 48 +-
compiler/types/TyCon.lhs-boot | 15 +-
compiler/utils/IOEnv.hs | 5 +
configure.ac | 93 +-
distrib/configure.ac.in | 16 +-
distrib/mkDocs/mkDocs | 2 +-
docs/users_guide/7.6.1-notes.xml | 427 +++
docs/users_guide/flags.xml | 9 +-
docs/users_guide/intro.xml | 2 +-
docs/users_guide/ug-ent.xml.in | 2 +-
ghc.mk | 51 +-
ghc/GhciMonad.hs | 17 +-
ghc/InteractiveUI.hs | 28 +-
ghc/Main.hs | 11 +-
ghc/ghc-bin.cabal.in | 4 +-
ghc/ghc.mk | 8 +-
includes/ghc.mk | 22 +-
libffi/ghc.mk | 2 +-
libraries/bin-package-db/bin-package-db.cabal | 2 +-
mk/compiler-ghc.mk | 1 -
mk/config.mk.in | 49 +-
mk/validate-settings.mk | 6 +-
rts/Capability.h | 7 +-
rts/RtsUtils.c | 2 +-
rts/StgCRun.c | 6 +-
rts/posix/Select.c | 12 +-
rules/build-package-data.mk | 4 +-
rules/build-package.mk | 2 +-
rules/haddock.mk | 2 +-
rules/shell-wrapper.mk | 2 +-
sync-all | 4 +
utils/ghc-cabal/ghc-cabal.cabal | 4 +-
utils/ghc-pkg/ghc.mk | 33 +-
utils/ghctags/Main.hs | 2 +-
105 files changed, 2183 insertions(+), 4713 deletions(-)
diff --cc compiler/llvmGen/Llvm/PpLlvm.hs
index ad435b8,c217778..760cdc1
--- a/compiler/llvmGen/Llvm/PpLlvm.hs
+++ b/compiler/llvmGen/Llvm/PpLlvm.hs
@@@ -303,31 -302,27 +304,44 @@@ ppCmpOp op left right
ppAssignment :: LlvmVar -> Doc -> Doc
ppAssignment var expr = (text $ getName var) <+> equals <+> expr
+-- XXX: On x86, vector types need to be 16-byte aligned for aligned access, but
+-- we have no way of guaranteeing that this is true with GHC (we would need to
+-- modify the layout of the stack and closures, change the storage manager,
+-- etc.). So, we blindly tell LLVM that *any* vector store or load could be
+-- unaligned. In the future we may be able to guarantee that certain vector
+-- access patterns are aligned, in which case we will need a more granular way
+-- of specifying alignment.
+ ppFence :: Bool -> LlvmSyncOrdering -> Doc
+ ppFence st ord =
+ let singleThread = case st of True -> text "singlethread"
+ False -> empty
+ in text "fence" <+> singleThread <+> ppSyncOrdering ord
+
+ ppSyncOrdering :: LlvmSyncOrdering -> Doc
+ ppSyncOrdering SyncUnord = text "unordered"
+ ppSyncOrdering SyncMonotonic = text "monotonic"
+ ppSyncOrdering SyncAcquire = text "acquire"
+ ppSyncOrdering SyncRelease = text "release"
+ ppSyncOrdering SyncAcqRel = text "acq_rel"
+ ppSyncOrdering SyncSeqCst = text "seq_cst"
ppLoad :: LlvmVar -> Doc
-ppLoad var = text "load" <+> texts var
-
+ppLoad var
+ | isVecPtrVar var = text "load" <+> texts var <>
+ comma <+> text "align 1"
+ | otherwise = text "load" <+> texts var
+ where
+ isVecPtrVar :: LlvmVar -> Bool
+ isVecPtrVar = isVec . pLower . getVarType
ppStore :: LlvmVar -> LlvmVar -> Doc
-ppStore val dst = text "store" <+> texts val <> comma <+> texts dst
-
+ppStore val dst
+ | isVecPtrVar dst = text "store" <+> texts val <> comma <+> texts dst <>
+ comma <+> text "align 1"
+ | otherwise = text "store" <+> texts val <> comma <+> texts dst
+ where
+ isVecPtrVar :: LlvmVar -> Bool
+ isVecPtrVar = isVec . pLower . getVarType
ppCast :: LlvmCastOp -> LlvmVar -> LlvmType -> Doc
ppCast op from to = texts op <+> texts from <+> text "to" <+> texts to
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