<div dir="ltr">On Tue, Feb 5, 2013 at 12:56 AM, Johan Tibell <span dir="ltr"><<a href="mailto:johan.tibell@gmail.com" target="_blank">johan.tibell@gmail.com</a>></span> wrote:<br><div class="gmail_extra"><div class="gmail_quote">
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="im">On Mon, Feb 4, 2013 at 3:19 PM, Geoffrey Mainland <span dir="ltr"><<a href="mailto:mainland@apeiron.net" target="_blank">mainland@apeiron.net</a>></span> wrote:</div>
<div class="gmail_quote"><div class="im"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
What would a sensible fallback be for AVX instructions? What should we<br>
fall back on when the LLVM backend is not being used?<br></blockquote><div><br></div></div><div>Depends on the instruction. A 256-bit multiply could be replaced by N multiplies etc. For popcount we have a little bit of C code in ghc-prim that we use if SSE 4.2 isn't enabled. An alternative is to emit some different assembly in e.g. the x86-64 backend if AVX isn't enabled.</div>
<div class="im">
<div></div></div></div></blockquote><div><br></div><div style>The currently widest registers are 512 bits on Intel Phi. AVX is designed to handle 1024-bit wide registers (there's an unused bit in the VEX prefix).</div>
<div style><br></div><div style>Alexander</div><div style><br></div></div></div></div>