It seems like it would still be useful for *optimizing* the implementation of STM in Haskell; in particular, small transactions seem like a great way to implement lock-free data structures by handling the non-composability of compare-and-swap.<br>
<br>So while you wouldn&#39;t implement &quot;atomically a&quot; by &quot;XBEGIN; a; XEND&quot;, you might implement atomically by doing the transaction log as we do now, then using XBEGIN/XEND around the commit operation.<br>
<br>  -- ryan<br><br><div class="gmail_quote">On Thu, Feb 9, 2012 at 11:12 AM, Austin Seipp <span dir="ltr">&lt;<a href="mailto:mad.one@gmail.com">mad.one@gmail.com</a>&gt;</span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
Duncan Coutts talked a bit about this on Reddit here:<br>
<br>
<a href="http://www.reddit.com/r/programming/comments/pfnkx/intel_details_hardware_transactional_memory/c3p4oq7" target="_blank">http://www.reddit.com/r/programming/comments/pfnkx/intel_details_hardware_transactional_memory/c3p4oq7</a><br>

<div class="HOEnZb"><div class="h5"><br>
On Thu, Feb 9, 2012 at 12:43 PM, Ben &lt;<a href="mailto:midfield@gmail.com">midfield@gmail.com</a>&gt; wrote:<br>
&gt; <a href="http://arstechnica.com/business/news/2012/02/transactional-memory-going-mainstream-with-intel-haswell.ars" target="_blank">http://arstechnica.com/business/news/2012/02/transactional-memory-going-mainstream-with-intel-haswell.ars</a><br>

&gt;<br>
&gt; would any haskell STM expert care to comment on the possibilities of hardware acceleration?<br>
&gt;<br>
&gt; best, ben<br>
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<br>
<br>
<br>
</div></div><span class="HOEnZb"><font color="#888888">--<br>
Regards,<br>
Austin<br>
</font></span><div class="HOEnZb"><div class="h5"><br>
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