<div dir="ltr">Our formal methods team at Intel has a full-time position available that I think would be a good fit for functional programming and formal methods enthusiasts. I'm including the description below. Do not hesitate to contact me if you've any questions, or just want to talk about it in general. To apply for the position, please visit: <span style="font-size:11pt;font-family:Calibri,sans-serif"><a href="http://www.intel.com/jobs/jobsearch/index.htm">http://www.intel.com/jobs/jobsearch/index.htm</a>, and in the "advanced search" area enter the job number: </span><span class=""><span style="font-size:11pt;font-family:Calibri,sans-serif">709631.</span></span><div>
<span class=""><span style="font-size:11pt;font-family:Calibri,sans-serif"><br></span></span></div><div style><span class=""><span style="font-size:11pt;font-family:Calibri,sans-serif">Thanks,</span></span></div><div style>
<span class=""><span style="font-size:11pt;font-family:Calibri,sans-serif"><br></span></span></div><div style><span class=""><span style="font-size:11pt;font-family:Calibri,sans-serif">-Levent.</span></span></div><div style>
<span class=""><span style="font-size:11pt;font-family:Calibri,sans-serif"><br></span></span></div><div style><span class=""><h1 style="vertical-align:top"><span style="font-size:8.5pt;font-family:Arial,sans-serif;color:black">Job Description</span><span class=""><span style="font-size:7.5pt;font-family:Arial,sans-serif"> </span></span><span style="font-size:7.5pt;font-family:Arial,sans-serif"></span></h1>
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<p class=""><b><span style="font-size:9pt;font-family:Arial,sans-serif;color:rgb(8,96,168)">Formal Methods & Validation Architect</span></b><span class=""><span style="font-size:7.5pt;font-family:Arial,sans-serif"> </span></span><b><span style="font-size:9pt;font-family:Arial,sans-serif;color:rgb(8,96,168)">-</span></b><span class=""><span style="font-size:7.5pt;font-family:Arial,sans-serif"> </span></span><b><span style="font-size:9pt;font-family:Arial,sans-serif;color:rgb(8,96,168)">709631</span></b><span style="font-size:7.5pt;font-family:Arial,sans-serif"> </span></p>
<h2><span style="font-size:8.5pt;font-family:Arial,sans-serif;color:black">Description</span><span style="font-size:7.5pt;font-family:Arial,sans-serif"></span></h2>
<p class="" style="margin:0in 0in 0.0001pt"> <span style="font-size:7.5pt;font-family:Arial,sans-serif"></span></p>
<p class="" style="margin:0in 0in 0.0001pt"><span style="font-size:7.5pt;font-family:Arial,sans-serif">If you're interested
in products going into future super computer markets then the Intel® Many
Integrated Core (Intel® MIC) Hardware Engineering Group is the place for
you! We design and validate silicon chips with many Intel cores
integrated inside being used in high performance computing architectures.</span></p>
<p class="" style="margin:0in 0in 0.0001pt"><span style="font-size:7.5pt;font-family:Arial,sans-serif"> </span></p>
<p class="" style="margin:0in 0in 0.0001pt"><span style="font-size:7.5pt;font-family:Arial,sans-serif">In this position you
will work as part of the pre-silicon formal methods, tools, and verification
team to support a continued high quality of the future Intel many core
processor products. You will work together with Intel's formal verification
and validation community, the Formal Verification Center of Expertise (FV CoE)
in a team of experts in formal methods and AV Validation.</span></p>
<p class="" style="margin:0in 0in 0.0001pt"><span style="font-size:7.5pt;font-family:Arial,sans-serif"> </span></p>
<p class="" style="margin:0in 0in 0.0001pt"><span style="font-size:7.5pt;font-family:Arial,sans-serif">Your specific
responsibilities will include defining formal verification (FV) test plans as
well as Cluster Test Environment (CTE) based test plans for dynamic
simulation validation (DV). The goal is to help optimize a combined use of FV
and CTE based validation techniques (DV) and contribute to an increasing use
of formal methods at Intel. Based on the test plans you will write properties
in formal language, and prove the properties using our model checkers and
theorem proving tools. You will also write CTE based test cases and coverage
plans. Your area of strength may currently lie within either FV or DV with
strong skills rooted in software development. But through your skills and
work, you will become an expert in both formal methods and validation
technologies. You will interact very closely with design teams, and other
validation teams, as well as with Intel's internal R&D groups that
continue to improve and develop formal method and verification tools.</span></p>
<p class="" style="margin:0in 0in 0.0001pt"><span style="font-size:7.5pt;font-family:Arial,sans-serif"> </span></p>
<p class="" style="margin:0in 0in 0.0001pt"><span style="font-size:7.5pt;font-family:Arial,sans-serif">You must be able to
communicate effectively with various technical groups and coordinate
activities amongst those groups.</span></p>
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